Senior Lead Engineer Job
If this is a scam...
Mark as SPAM
Thank you for helping!...
Undo
Employer: Quest Global Services-N.A., Inc.
SpiderID: 14115733
Location: Windsor, Connecticut
Posted: 12/18/2025
Wage:
Priority Review Date: 1/17/2026
Job Code / NOC / SOC: 28290.0289
Category: Engineering
Job Description:
Company:Quest Global Services-N.A., Inc.
Position Title: Senior Lead Engineer
Location: 175 Addison Rd, Ste. 6F, Windsor, CT 06095 and unanticipated client locations throughout the U.S.
Position Responsibilities: Work on verification of Mixed-Signal ASIC designs involving ARM cores. Assertion based, Coverage driven Constraint Random Verification using SystemVerilog, UVM, C/C++. Involved in Design Verification of IPs and SoCs with programmable cores, accelerators, DSPs. Work on AMBA AXI4 protocol, AMBA low power interfaces. Work with cross functional teams such as Architecture/Design/PD/Emulation/Software. Successfully tape out multiple projects by being involved in all stages of Design Verification cycle viz., test plan creation, environment building from scratch, 100% regression, 100% coverage, LPF/GLS simulation, Formal verification, Emulation, FPGA prototyping, post-silicon support.
Position Requirements: Master’s degree (or foreign equivalent) in Computer Engineering, Electrical Engineering, or related field, PLUS two (2) years of experience in the job offered or a related position. Experience must include demonstrable knowledge of: Verilog/SystemVerilog; UVM; Constrained Random Verification; System Verilog assertions; Coverage; C/C++; Python; AMBA AXI, and; Debugging skills. Required knowledge may be gained prior to or concurrently with Master’s degree. Travel to unanticipated client locations throughout the U.S., approximately 30% as required. Any suitable combination of education, training, or experience is acceptable.
To apply, please email resume to [email protected]. Reference job code 28290.0289.
Position Title: Senior Lead Engineer
Location: 175 Addison Rd, Ste. 6F, Windsor, CT 06095 and unanticipated client locations throughout the U.S.
Position Responsibilities: Work on verification of Mixed-Signal ASIC designs involving ARM cores. Assertion based, Coverage driven Constraint Random Verification using SystemVerilog, UVM, C/C++. Involved in Design Verification of IPs and SoCs with programmable cores, accelerators, DSPs. Work on AMBA AXI4 protocol, AMBA low power interfaces. Work with cross functional teams such as Architecture/Design/PD/Emulation/Software. Successfully tape out multiple projects by being involved in all stages of Design Verification cycle viz., test plan creation, environment building from scratch, 100% regression, 100% coverage, LPF/GLS simulation, Formal verification, Emulation, FPGA prototyping, post-silicon support.
Position Requirements: Master’s degree (or foreign equivalent) in Computer Engineering, Electrical Engineering, or related field, PLUS two (2) years of experience in the job offered or a related position. Experience must include demonstrable knowledge of: Verilog/SystemVerilog; UVM; Constrained Random Verification; System Verilog assertions; Coverage; C/C++; Python; AMBA AXI, and; Debugging skills. Required knowledge may be gained prior to or concurrently with Master’s degree. Travel to unanticipated client locations throughout the U.S., approximately 30% as required. Any suitable combination of education, training, or experience is acceptable.
To apply, please email resume to [email protected]. Reference job code 28290.0289.
Contact Information:
| Contact Name: Quest Global Services-N.A., Inc. | Type: |
| Company: |