SI Engineer - Computer Hardware Resume Search
SI Engineer - Computer Hardware Resume Search
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SI Engineer Resume


Desired Industry: Computer Hardware SpiderID: 75482
Desired Job Location: Colorado Springs, Colorado Date Posted: 5/30/2015
Type of Position: Full-Time Permanent Availability Date: 6/01/2015
Desired Wage: $100,000.00
U.S. Work Authorization: Yes
Job Level: Experienced with over 2 years experience Willing to Travel: Yes, Less Than 25%
Highest Degree Attained: Bachelors Willing to Relocate: Yes


Objective:
Signal Integrity Engineer, Power Integrity Engineer, RF Engineer, Microwave Engineer, Package Design Engineer, Simulation Engineer, Test Engineer


Experience:
Designed, built, tuned, VNA test-fixtures with 40-GHz bandwidth
tens-of-thousands of HFSS Simulations last 17-years
About 30 successful IC packages into production
SI Wave to develop 80-port double bus DDR2 IC and Package co-design and simulation technique (mixing extracted s-parameters with HSPICE (run by PhD friend)) assuring first-pass success on HDMI controller
Antenna modules for satellite and airplane mounted beam-steering arrays
10-GHz to 50-GHz designs on regular basis starting 1997-2015
Filters, Baluns, Standard and Custom technology
Guided PCB design of high-speed lines for an ARM product using 18-GHz SerDes
200-GHz bandwidth PolyStrata design
Antenna simulations for blue tooth and arrays
Designed 4-element feeding system (including coax and baluns) for DARPA project at Nuvotronics
Working in teams to create products; making PPT presentations for engineers, managers, VPs, CEO’s, and Directors; establishing relationships with off-shore vendor’s engineers, when moving a product through design and into production
First 6-years of HFSS design I verified my designs with VNA measurements
Designed built and tuned microwave (40-GHz) test-fixtures for VNA at Kyocera
Military ceramic module design from 10-GHz to 50-GHz at Kyocera
Designed Lead-Frame package with 40-GHz bandwidth, featured on Kyocera home page
Designed and simulated blue-tooth ceramic antenna with HFSS; beam-patterns matched in-house and contract vendor antenna measurements
Developed and presented concept of folding stripline filter into multiple ceramic layers to conserve real-estate when mounted on board
Drew up design improvements for the GPPO miniature coax connectors and gave to Gilbert (the manufacturer)
10-Gbps package (ceramic, flipchip, bga) for AMCC
10-Gbps packages in organic plastic for AMCC
40-Gbps 16:1 MUX package for AMCC (designed SerDes 1.85mm interface)
Verified designs with 110-GHz VNA and Cascade Automated Probe Station
HFSS design improvements for a Cascade Pyramid Test Membrane using my custom designed resistors and capacitors in this simulation for a 50-dB gain, single-ended input, differential output
NASA: High-Altitude Test Chambers, configuring the system and supporting live firings for Minuteman Decommissioned Missiles
Antenna Modules for Satellite; Supported live Firings at High-Altitude Test Chambers, NASA, 1996 and again 2005-2008, White Sands Test Facility. Walked tunnels with technicians to verify existing wiring from test-chamber to Signal Conditioning Cabinet Room. Re-configured wiring of stands. Designed and programmed 64-channel Engine Simulator for Johnsons Space Center so they could test their Engine Controllers. This was a LabView design I took over and it used to simulate the valves, temperature, and pressure measurements and simulated good firings and also anomalies. Programmed OPTO22 to maintain pressure in 500-Gallon Hydrazine and Nitrogen Tetroxide tanks located at the Test Stands
NASA: Designed and verified test equipment used to rebuild Space Shuttle Thrusters and also the Orbital Maneuvering Engine
Joined AMI Semiconductor (bought by ON Semi during my tenure) and became first in-house electrical modeling and package designer
Developed comprehensive power and si simulation technique with PhD
Design and release of 3 major (44mm packages with 20mm Die) packages at Avago Technologies including devices for Juniper and Bull Supercomputer
Nuvotronics designed 20-GHz Baluns, Time Delay Units, and Antenna Modules using their Proprietary Technology, Polystrata (Polystrata uses 25-um wafer technology to build miniature passive structures of rectangular coax, air-filled, Gold conductor (ultra low loss)
AMD was a major support role. The systems for XBOX ONE and PS4 were designed years earlier. But now it was the “re-design phase.” I was responsible for providing S-Parameter models of the system, using HFSS and SI Wave, so timing engineers could build up system level models
Aeroflex I was brought on for this 6mm tall, 1-inch wide ceramic package with over 30 layers. I created HFSS simulations of the SerDes and transmission lines, created 14-GHz bandwidth improvements; also used SI Wave and created Power Analysis Simulations for each power domain using the package populated with 120 capacitors
Aeroflex: also created PPT presentations for surrounding companies’ VP, President, CEOs, Directors, and Managers


Education:
Bachelor of Science Electrical and Computer Engineering; NMSU; Dec 1994;
Las Cruces, NM; Microwave Engineering, Electromagnetics, Antenna
GPA: 3.3
Deans List; Honor Roll


Skills:
HFSS; SI Wave; Q3D; Agilent ADS, Ansys Designer, Cadence; LabView, OPTO22, Package and PCB Layout; Network Analyzers and probe stations, Single-Ended, Differential, CPW, Stripline, Microstrip, BGA, Flipchip, Wirebond, Plastic, Organic, Ceramic (HTCC and LTCC), 4 to 30 layers


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