|Desired Industry: Engineering
|Desired Job Location: San Jose, California
||Date Posted: 4/7/2010
|Type of Position: Internship
||Availability Date: 05/17/2010
|Desired Wage: 60000
||U.S. Work Authorization: No
|Job Level: New Grad/Entry Level
||Willing to Travel: Yes, Less Than 25%
|Highest Degree Attained: Masters
||Willing to Relocate: Yes
To obtain an internship opportunity in a
company in the field of hardware design,
development and testing that will enable
me to use my strong educational
Intern, Dynalec Controls Ltd. August
2005 to May 2006
Design and Development:
* Designed and developed ‘Error Detector
and Event Recorder’ consisting of
various circuit elements including
Microcontroller, Seven-Segment Displays,
RS-232 Serial Communication port.
* Number of input lines representing
different physical parameters was
individually compared with respective
reference signals. Undesired
fluctuations were recorded and indicated
with various circuit elements.
* Testing was done by applying different
values of voltages at the input.
Software Engineer, Infosys Technologies
Ltd. December 2006 to July 2008
Contributed to the financial project for
the US client M/S. Baker Hughes Inc.
(Headquartered at Houston, Texas)
Design and Development:
* Designed and developed solely various
aspects of the project like, Data Tie-
out, Security Utility, Period 14
Utility, EOP Utility, HFM Batch program,
FDM VB Scripting with SQL Server
* Development of most of these utilities
was done using VB Scripting in MS Access
Database and MS Excel.
* Tested all the program utilities
developed during the project with real-
time data before deployment.
* Extended online support to the client
during the implementation stage and
improved problem solving skills.
Webmaster, College of Dentistry,
University of Illinois at Chicago
September 2008 - Present
To develop and maintain the UIC College
of Dentistry website
* Designing of templates in Adobe
Dreamweaver CS3 using ColdFusion,
* Creating web pages using these
M.S. Degree Candidate: Electrical and
Computer Engineering December 2010
University of Illinois at Chicago. GPA:
B.E. Degree: Electronics and
Telecommunications May 2006
University of Pune, India. Grade: First
Operating systems Windows (98, 2000, XP,
Vista, 7), Linux, MAC OS 10.X.
Software tools Synopsys Scirocco
Simulator, Cadence Virtuoso, Altera
Quartus II, HSPICE, CosmosScope, ATPG-
Atalanta, NI LabVIEW, PCB Design-
Eagle5.6.0, Adobe DreamweaverCS3, SQL
Server8.0, Oracle10g, SAP-BW, MS Visio,
MS Office Applications, MS Project.
Programming Languages VHDL, Assembly
Language, C, Matlab, Visual Basic, VB
Scripting, PERL Scripting, SQL.
Networking tools Hyper Terminal, Cisco
Packet Tracer5.2, Wireshark Network
Web Development CSS, HTML, ASP,
CISCO CCNA CERTIFICATION TRAINING
* Network Fundamentals * Routing
Protocols and Concepts * LAN Switching
Automatic Test Pattern Generation and
* Atalanta is used to generate test
vectors for a circuit under test by way
of deterministic and random test pattern
generation methods and then to run fault
simulation over the results obtained.
* Fault coverage efficiency of Atalanta
by deterministic approach and random
approach are compared for conclusion.
Test pattern files, Fault list files and
Report files were the various
deliverables of this project.
FPGA Boolean Matching using SAT-Solver
* Focuses on automation of SAT based
Boolean Matching of any given PLB
configuration to a given Boolean
function. Boolean Satisfiability is
tested using Z-Chaff SAT Solver.
* Developed a tool that outputs the pin
assignment and LUT configuration bits
for the given PLB configuration if the
Boolean matching is satisfiable.
Implementation was entirely done using C
Universal Shift Register
* Developed a complete schematic and
layout design for a four-bit universal
shift-register using Cadence Virtuoso
Custom IC Design tool.
* Includes four different
functionalities - Hold, Reset (Clear),
Two's complement and Parallel-In
* Schematic/Circuit design using MOSFETs
and various circuit components, Physical
verifications - DRC, LVS of the layout
for individual basic gates and the
complete shift-register layout design
are the major steps involved.
Employment Management System
* The Employment Management System
provides an interface where people can
find information on potential
employment, submit applications and
receive communication from interested
* Enables the employers to enroll in the
Employment Management System (EMS) to
cost-effectively look for people.
* JSP for the Web Interface and Oracle
10g for database management were used.
Error Detector and Event Recorder
* Embedded product design and
development useful for a closed loop
* Objective is to monitor a system for
the physical parameters that triggers
the feedback mechanism to take necessary
* Indicative responses using seven-
segment displays and buzzers are
included. Such events are also recorded
through serial communication to PC.
Uninterruptible Power Supply
* Any home appliance like Personal
Computer, Television, etc. where
unexpected power disruption causes
serious data losses, and injuries, UPS
protects them by supplying power using
the battery that stores energy.
* It is based on the idea of supplying
power to the critical loads by using a
battery, which charges during the
presence of the power supply and
discharges by supplying power to the
loads during the power failure.
Design for Manufacturability (DFM)
* Focus of this paper project was on a
technique that might be useful to be
considered during the design phase to
obtain better manufacturability.
* Regular fabric architecture can be
followed to avoid process and parametric
variations during the IC
photolithographic manufacturing process
to a great extent.
Available upon request.
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