Physical Design Engineer job Santa Clara California
Physical Design Engineer job Santa Clara California
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Physical Design Engineer Job

Employer Name: Synapse Design Automation, Inc. SpiderID: 8678340
Location: Santa Clara, California Date Posted: 5/24/2019
Wage: 170,872.00 Category: Computer Hardware
Job Code: 156480
Number Of Openings: 1

Job Description:
Participate in design, verification, and validation of hardware and software systems using applications functions such as eda (electronic design automation) tools and various unix/windows compilers and development systems.

design and develop physical design aspects for 7nm, 10nm, 16nm, 20nm, 28nm, 40nm products including netlist checks, floor planning, placement, clock tree synthesis, routing, static timing analysis, si closure, dfm fixes, repeater planning, formal verification, low power verification, physical verification, ir analysis, em analysis, develop technology guidelines for block and top level, debug flow and tool issues.

Develop software for these ics and systems, using object oriented methodologies and languages such as perl and tcl. - develop and document design implementation methodology including the tool flow, processes, scripts, and signoff criteria; verify the methodology by running representative design through performing major physical implementation (place and route) steps and ensure the delivery of design to chip fabrication facility meets both technical specifications and all physical design rules.

Assist in running test cases on the design, making enhancements to improve the functionality.

Develop hardware designs at the integrated circuit (ic), starting at reading netlist and generating a physical (place and route) database with the help of tools ic compiler and cadence innovus.

Verifying the resulting designs meet all the functional specification using Cadence-lec. Check if low-power designs meet required power guidelines using clp. for static timing analysis and signal integrity, extract of the designs using star-rc to check timing with timing sign-off engine prime time before sending out chip for fabrication do physical.

Design verification using calibre drc, lvs, synopsys ic verification to ensure chip can be manufactured in foundry, chip meets all manufacturing rules, the chip circuit will operate post-silicon.

This position may require travel and/or relocation to various unanticipated Client sites throughout the USA.

Mail resumes to: HR, Synapse, 2200 Laurelwood Road, Santa Clara, CA 95054.

Job Requirements:
Job entails working with and requires masters or foreign academic equivalent in electronics/electrical engineering, micro electronics and vlsi design, computer science, computer engineering or a related field with 3 years of experience including: ic compiler,ic verification, cadence-lec,cadence innovus, star-rc, calibre drc,lvs,primetime and clp. Employer will accept any suitable combination of education, training or experience. This should be read to mean that the employer requires: masters or foreign academic equivalent in electronic/electrical engineering, micro electronics and vlsi design, computer science, computer engineering or a related field with 3 years of experience in the job offered or any electrical/design engineering positions or related occupations.

Job Criteria:
Start Date:
Position Type: Full-Time Permanent
Years of Experience Required: 3
Education Required: Masters
Overnight Travel: None
Vacation Time: Negotiable / Other

Contact Information:
Contact Name: Rosheni Fernando Company Type: Employer
Company: Synapse Design Automation, Inc.
City: Santa Clara
State: California
Zip: 95054

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